An Algebraic Model of Correctness for Superscalar Microprocessors
نویسندگان
چکیده
A set of algebraic tools for microprocessors (Harman and Tucker [1995a], Harman and Tucker [1994], Fox and Harman [1996b]) are extended to accommodate superscalar processors, where instructions may be executed in parallel, or out of program order. This has implications for the representation of timing abstraction, the relationship between time at different levels of abstraction, and the concept of the correctness of one representation with respect to another. We illustrate our tools with a simple, superscalar example, and extend our one-step theorems for simplifying the formal verification of microprocessors (Harman and Tucker [1995a], Harman and Tucker [1994], Fox and Harman [1996b]) to superscalar processors.
منابع مشابه
Algebraic Models of Simultaneous Multithreaded and Multi-core Processors
Much current work on modelling and verifying microprocessors can accommodate pipelined and superscalar processors. However, superscalar and pipelined processors are no longer state-of-the-art: Simultaneous Multithreaded (SMT) and Multi-core, or Chip-Level Multithreaded (CMT) microprocessors enable a single microprocessor implementation to present itself to the programmer as multiple (virtual in...
متن کاملAlgebraic Models of Superscalar Microprocessor Implementations: A Case Study
In this chapter, we extend a set of algebraic tools for microprocessors (Harman and Tucker [1996], Harman and Tucker [1997] and Fox and Harman [1996a]) to model superscalar microprocessor implementations, and apply them to a case study. In superscalar microprocessors, the timing of events in an implementation can be substantially different from that of the architecture that they implement. We d...
متن کاملAutomatic Abstraction of Memories in the Formal Verification of Superscalar Microprocessors
A system of conservative transformation rules is presented for abstracting memories whose forwarding logic interacts with stalling conditions for preserving the memory semantics in microprocessors with in-order execution. Microprocessor correctness is expressed in the logic of Equality with Uninterpreted Functions and Memories (EUFM) [6]. Memory reads and writes are abstracted as arbitrary unin...
متن کاملAutomatic Abstraction of Memories in the Formal Verification of
A system of conservative transformation rules is presented for abstracting memories whose forwarding logic interacts with stalling conditions for preserving the memory semantics in microprocessors with in-order execution. Microprocessor correctness is expressed in the logic of Equality with Uninterpreted Functions and Memories (EUFM) [6]. Memory reads and writes are abstracted as arbitrary unin...
متن کاملA Systematic Methodology for Verifying Superscalar Microprocessors
We present a systematic approach to decompose and incrementally build the proof of correctness of pipelined microprocessors. The central idea is to construct the abstraction function by using completion functions, one per un nished instruction, each of which speci es the e ect (on the observables) of completing the instruction. In addition to avoiding the term size and case explosion problem th...
متن کاملذخیره در منابع من
با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید
عنوان ژورنال:
دوره شماره
صفحات -
تاریخ انتشار 1996